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This section covers all information needed to implement Task 1: RISC ISA and Assembler.  We first define the Instruction Set Architecture (ISA) our processor supports.  Then, we describe the assembler we wrote, and the general inputs and outputs of our processor.


Instruction Set ArchitectureEdit

The ISA we chose for our system is based off of the MIPS32-ISA.  We broke our ISA into three categories: memory type, register type, and control type.  Our processor supports the following instructions from the three categories:


Memory Type InstructionsEdit

LW Instruction
Description: Loads a value from data memory into the indicated register.
Operation: $t = MEM[imm+$s]
Syntax: LW $t, imm($s)
Encoding: 1000 11ss ssst tttt iiii iiii iiii iiii
SW Instruction
Description: Stores a value from the indicated register into data memory.
Operation: MEM[immediate] = $s
Syntax: SW $s, immediate
Encoding: 1010 11ss sss0 0000 iiii iiii iiii iiii


Register Type InstructionsEdit

ADD Instruction
Description: Performs an addition operation between two registers and stores the results in another register.
Operation: $d = $s + $t
Syntax: ADD $s, $t, $d
Encoding: 0000 00ss ssst tttt dddd d000 0010 0000
SUB Instruction
Description: Performs an subtraction operation between two registers and stores the results in another register.
Operation: $d = $s - $t
Syntax: SUB $s, $t, $d
Encoding: 0000 00ss ssst tttt dddd d000 0000 0110
MOD Instruction
Description: Performs an modular arithmetic operation between two registers and stores the results in another register.
Operation: $d = $s % $t
Syntax: MOD $s, $t, $d
Encoding: 0000 00ss ssst tttt dddd d000 0000 1001


Control Type InstructionsEdit

BEQ Instruction
Description: Performs a branch operation to the indicated instruction if the values between two registers are equal.
Operation: if $s == $t, then PC = immediate; else PC = PC + 4
Syntax: BEQ $s, $t, immediate
Encoding: 0001 00ss ssst tttt iiii iiii iiii iiii


Other InstructionsEdit

NOP Instruction
Description: Performs no operation.
Operation: ---
Syntax: NOP
Encoding: 0000 0000 0000 0000 0000 0000 0000 0000

AssemblerEdit

For this project, we were required to write a two-pass assembler to convert the assembly program into executable binaries for our processor.


We chose to write our assembler in Java because we were all quite familiar with the language and because it is platform independent.  The first pass of our assembler configures and resolves all labels, grabbing and indexing each one it encounters.  Then, using a parser generator tool called ANTLR, we build a custom grammar to define the exact syntax for our ISA and generate a token parser.  Once the syntax check is successful, we pass through a second time to parse the tokens and configure the proper conversion into a .mif file.

VerificationEdit

<Verification for this task can be viewed in Final Report.  We will also include it here when we are able.  Thank you for your patience.>

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